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This design implements the SPI master in the CPOL = ‘0’ and CPHA = ‘0’ mode. It sets the clk_div parameter based on the system clock frequency (specified with the clk_freq generic parameter, see below) to communicate with the accelerometer at the maximum SPI frequency specified in the ADXL345’s ADXL362’s datasheet, i.e. 8 MHz.
This design also utilizes the Continuous Mode feature of the SPI Master to execute transactions of varying lengths. The transactions in the configure state are 24 bits long, whereas the transactions in the read_data state are comprised of 64 bits.
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Table 2. Data Range Options
Data Range | Sensitivity (mg/LSB) | Setting |
---|---|---|
±2g | 1 | 00 |
±4g | 2 | 01 |
±8g | 4 | 1X |
Port Descriptions
Table 3 describes the Accelerometer Pmod Controller’s ports.
Table 3. Port Descriptions
Port | Width | Mode | Data Type | Interface | Description |
---|---|---|---|---|---|
clk | 1 | in | standard logic | user logic | System clock |
reset_n | 1 | in | standard logic | user logic | Asynchronous active low reset |
miso | 1 | in | standard logic | Accelerometer Pmod | SPI master in, slave out data line |
sclk | 1 | buffer | standard logic | Accelerometer Pmod | SPI serial clock |
ss_n | 1 | buffer | standard logic vector | Accelerometer Pmod | SPI slave select signal |
mosi | 1 | out | standard logic | Accelerometer Pmod | SPI master out, slave in data line |
acceleration_x | 12 | out | standard logic vector | user logic | x-axis acceleration data |
acceleration_y | 12 | out | standard logic vector | user logic | y-axis acceleration data |
acceleration_z | 12 | out | standard logic vector | user logic | z-axis acceleration data |
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Table 4. Accelerometer Pmod Pinout and Connections to Accelerometer Pmod Controller
Pmod Pin Number | Accelerometer Pmod Port | Accelerometer Pmod Controller Port |
---|---|---|
1 | chip select (CS) | ss_n(0) |
2 | master out, slave in (MOSI) | mosi |
3 | master in, slave out (MISO) | miso |
4 | serial clock (SCLK) | sclk |
5 | GND | - |
6 | VCC | - |
7 | interrupt 2 (INT2) | - |
8 | interrupt 1 (INT1) | - |
9 | no connect (NC) | - |
10 | no connect (NC) | - |
11 | GND | - |
12 | VCC | - |
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