|This Swissbit module is an industry standard, 204-pin, 8-byte DDR3 SDRAM, Small Outline Dual-In-line Memory Module (SO-DIMM) that is organized as x64 high-speed CMOS memory arrays. The module uses internally configured, octal-bank DDR3 SDRAM devices, along with double data rate architecture, to achieve high-speed operation. DDR3 SDRAM modules operate from a differential clock (CK and CK#). READ and WRITE accesses to a DDR3 SDRAM module is burst-oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. The burst length is either four or eight locations, and an auto pre-charge function can be enabled to provide a self-timed row pre-charge that is initiated at the end of a burst access.
The DDR3 SDRAM devices have a multibank architecture which allows a concurrent operation that provides a high effective bandwidth. A self-refresh mode is provided and a power-saving “power-down” mode. All inputs, and all full drive-strength outputs, are SSTL_15 compatible. The DDR3 SDRAM module uses the serial presence detect (SPD) function implemented via serial EEPROM using the standard I2C protocol. This nonvolatile storage device contains 256 bytes. The first 128 bytes are utilized by the SO-DIMM manufacturer (Swissbit) to identify the module type, the module’s organization, and several timing parameters. The second 128 bytes are available to the end user.