- Module organization: dual rank 1024M x 72
- 1.5 V I/O ( SSTL_15 compatible)
- Fly-by-bus with termination for C/A & CLK bus
- On-board I2C temperature sensor with integrated serial presence-detect (SPD) EEPROM
- Gold-contact pad
- This module is fully pin and functional compatible to the JEDEC EP3-12800 DDR3 SDRAM 72bit-SO-DIMM design spec. and JEDEC- Standard MO-268.
- Programmable CAS Latency, CAS Write Latency, Additive Latency, Burst Length and Burst Type.
- 512 Mx8 DDR3 SDRAM in PG-TFBGA-78 package
- VDD = 1.5 V ±0.075 V, VDDQ 1.5 V ±0.075 V
- The pcb and all components are manufactured according to the RoHS compliance specification [EU Directive 2002/95/EC Restriction of Hazardous Substances (RoHS)]
- DDR3 - SDRAM component Samsung K4B4G0846B
- 8-bit prefetch architecture
- On-Die-Termination (ODT) and Dynamic ODT for improved signal integrity.
- Refresh, Self-Refresh and Power Down Modes
- ZQ Calibration for output driver and ODT
- System Level Timing Calibration Support via Write Leveling and Multi-Purpose Register (MPR) Read Pattern