|Silicon Laboratories' Si535/Si536 series provide ultra-low jitter reference timing for 10G, 40G, and 100G cloud computing and networking equipment. The Si535 and Si536 XOs leverage Silicon Labs’ proven DSPLL technology to provide unparalleled performance, stability, and flexibility for 10/40G data center core/access switches, storage area networking equipment, security routers, internet appliances, enterprise switches/routers, and Carrier Ethernet switches and routers. The Si535/536 XOs offer exceptional jitter performance of <200 femtoseconds (fs) RMS jitter (integrated from 10 kHz to 1 MHz) for common Ethernet and fibre channel reference frequencies. The Si535/536 oscillators support LVDS and LVPECL output formats at 2.5 V and 3.3 V and offer both ±20 ppm and 31.5 ppm total stability, simplifying interfacing to a wide variety of processors, switches, PHYs, and FPGAs. When combined with Silicon Labs’ Si53301/Si53302 differential clock buffers, the Si535/Si536 XOs provide low-jitter clock generation and distribution for SoCs requiring multiple high-performance reference clocks.