|The NXP microcontrollers LPC2917 and LPC2919 use a high-performance, 32-bit ARM968 core that operates at up to 80 MHz. On-chip memory resources include two tightly coupled memories (TCMs), a 16-KB instruction TCM (ITCM) and a 16-KB data TCM (DTCM). They both have 48 KB of SRAM. The LPC2917 has 512 KB of Flash memory and the LPC2919 has 768 KB.
To simplify design, these two devices offer consistent peripherals and code compatibility. Integrated CAN 2.0B controllers offer full CAN mode for message reception, triple transmit buffers with automatic priority scheduling, and extensive global CAN-acceptance filtering for high performance gateway functionality. They are also equipped with dual LIN 2.0 master controllers.
The two 3V 8-channel, 10-bit ADCs can be synchronized with the PWMs, making them ideal for Motor Control. Multiple serial communications interfaces increase design flexibility, provide larger buffer size, and deliver higher processing power. There are two 16C550 UARTs with 16-byte transmit and receive FIFO depths, and three full-duplex Q-SPI interfaces with four slave-select lines.
There are four 32-bit timers with capture/match channels for pulse measurements, four six-channel, 32-bit PWMs, and a Watchdog timer. A CPU clock, operating at a maximum of 80 MHz, is available from the on-chip phase-locked loop (PLL).
The LPC2917 and LPC2919 have 32-bit external memory controllers that support static memory-mapped devices, including RAM, ROM, Flash, burst ROM, and external I/O devices. For fast interrupt response, an integrated vectored interrupt controller (VIC) is included on each microcontroller. Also, for compatibility with existing tools, each device uses the standard ARM test/debug JTAG interface. The family is available in 100- and 144-pin LQFP packages.