SY898533L Fanout Buffer

Precision Differential 3.3 V Low Skew LVPECL 1:4 Fanout Buffer from Microchip

Micrel's SY898533L Fanout BufferMicrochip's SY898533L is a 3.3 V, low skew, 1:4 LVPECL fanout buffer with two selectable clock input pairs. Most standard differential input levels can be applied to the CLK, /CLK pair while LVPECL, CML, or SSTL input levels can be applied to the PCLK, /PCLK pair. To eliminate runt pulses on the outputs during asynchronous assertion/de-assertion of the clock enable pin, the clock enable is synchronized with the input signal.

Features Applications
  • Provides four differential 3.3 V LVPECL copies
  • Selects between differential CLK, /CLK or LVPECL clock inputs
  • CLK, /CLK pair accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL input levels
  • PCLK, /PCLK pair accepts LVPECL, CML, SSTL input levels
  • Guaranteed AC performance over temperature and supply voltage:
    • 650MHz Maximum output frequency
    • < 1.4 ns Propagation delay (In-to-Q)
    • < 30 ps Output skew
    • < 150 ps Part-to-part skew
    • Additive phase jitter, RMS: 0.06 ps (typical)
  • 3.3 V ±5% supply voltage
  • 0°C to 70°C temperature operating range
  • Available in a 20-pin TSSOP package
  • SONET clock distribution
  • Backplane distribution


ImageManufacturer Part NumberDescriptionAvailable Quantity
SY898533LKZ datasheet linkIC CLK BUFFER 2:4 650MHZ 20TSSOPSY898533LKZIC CLK BUFFER 2:4 650MHZ 20TSSOP0SY898533LKZ product page link
Published: 2009-11-27