Lattice Semiconductor's MachXO2 family of infinitely reconfigurable Programmable Logic Devices (PLDs) offers designers of low density PLDs an unprecedented mix of low cost, low power and high system integration in a single device. Combining an optimized look-up table (LUT) architecture with 65 nm embedded Flash process technology, the MachXO2 family delivers an increase in logic density, an increase in embedded memory, and a reduction in static power compared to the prior generation MachXO PLD family.
The MachXO2 family offers system designers the benefits of increased system integration, improved system robustness and reduced static power consumption. In addition, the MachXO2 family includes hardened implementations of some of the most popular functions used in system applications (telecom infrastructure, computing, high end industrial, high end medical) and consumer applications (smart phones, GPS devices, mobile computing, digital cameras). Thus, through the provision of these features, the MachXO2 family offers designers a "Do-it-All PLD" for system applications.
To accelerate system design using MachXO2, Lattice also offers a number of development kits, and an expanding portfolio of free reference designs.