Power management in portable devices is one of the toughest challenges faced by electronic engineers. The consumer demands instant response from their device, lots of functionality, and a large, bright and colorful touchscreen. Moreover, many of these portable devices now incorporate wireless connectivity that places further demand on the cell. And yet, the user expects the battery, a sensitive lithium ion (Li-ion) cell that requires careful recharging from a number of sources including USB sockets, to last for at least a day and then refresh quickly.
Designing a power management system to meet these conflicting problems is tough. However, there are some proven design techniques that help extend battery life. Moreover, the key semiconductor vendors have made life a little easier by offering power management units (PMUs) that integrate some, or even all, of the functionality needed for the efficient power supply of portable devices.
This article offers some design guidelines for minimizing energy consumption in handhelds and then highlights the latest integrated PMUs from Digi-Key suppliers.
Li-ion cells, the mainstay power source for high-demand portable devices, have improved in energy density (energy capacity/volume) by only about seven percent per year since they were first commercialized in 1991. Compared to the rapid increase in silicon chip performance, that is a snail’s pace. Nonetheless, lithium-based power for portable devices is particularly appealing for two key reasons: Lithium is the most electropositive metal (i.e., it exhibits a high positive charge), lending itself to batteries with higher voltages than other rechargeable types (around 3.6 V compared to 1.2 to 1.5 V for nickel-based batteries); and it is the lightest metal (only two elements, hydrogen and helium, are lighter) allowing the storage of more energy per kilogram than most other metals (around 3,900 Ahr/kg compared to 260 Ahr/kg for lead).¹ Other benefits include thousands of recharges and no occurrence of the “memory effect” that plagued early nickel cadmium (NiCd) rechargeable cells.
However, the fragile tendency of Li-ion batteries to overcharge imposes stringent recharge requirements. It is not just overcharging that is the problem, though. Even slight undercharging significantly reduces capacity. Consequently, designers aim to charge the cell to within one percent of its optimum full-charge to get the most out of this type of battery. (See the TechZone article “A Designer’s Guide to Lithium Battery Charging
Squeezing out the power
Minimizing power consumption to make the most of a Li-ion battery’s finite capacity has become something of a mantra for portable equipment designers. However, the key to extending battery life is to appreciate that a cell is an energy
-storage device. If a design uses that energy sparingly, the battery will last longer. Reducing power consumption often does reduce energy consumption, but that is not always the case.
Digital chips burn both static and dynamic power. The static power comprises things like bias currents and transistor gate leakage (Figure 1). Dynamic power consumption occurs during normal operation and includes the current used for switching CMOS circuits (“switching loss”) and the bias currents for the active analogue circuits of the device, such as analog-to-digital converters (ADC) or oscillators.
Figure 1: NMOS transistor leakage currents (Courtesy of Microchip).
For a system using negligible static power and taking a fixed number of clock cycles to complete a given operation, it makes virtually no difference whether the application runs fast and finishes in a short amount of time, or runs at half the clock speed (therefore halving the power consumption) and takes twice as long to finish; in each case the same amount of energy is consumed.
However, when the system burns significant static power, running slowly (lowering dynamic power consumption) can be less energy efficient than getting the job done quickly. That is because when the chip is performing an operational task, the total power used is the summation of static power and dynamic power; consequently, the longer the task takes, the more significant the static power becomes to the overall energy consumption.
Apart from considering whether a faster, high-power mode will ultimately reduce energy consumption and hence battery drain, experienced engineers also take into account the energy used when the device is doing no useful work.
This has resulted in power-management strategies incorporating so-called standby (or “power-down”) modes. Such modes limit static power consumption to just that used by the chip’s quiescent currents. In the standby mode, the chip burns no dynamic power because the clock pulse is turned off and the transistors do not switch. Reversion to the “active” mode is achieved quickly, treating the consumer to a seamless operational experience.
Chips in a portable product can typically enter a third mode known as “sleep”. In this mode, power consumption is limited to the sub-threshold leakage the transistors exhibit when the input supply is present but there is no activity (Figure 1). Chips typically take much longer to wake up from sleep than they do from standby, which might cause a slight pause in operation for the end-product user.
Overall system energy consumption takes into account the power level in each mode and the time the system typically spends in those modes.
The average power consumption and peak power consumption are also key parameters for managing the battery’s energy. Average power is important because it provides a single value that can be used to estimate battery life. Figure 2 illustrates how to calculate the average current (and hence power from the formula P = IV) for a system toggling between active and power-down modes.
Figure 2: Calculating average current (and hence power) for a system cycling between active and power-down modes (Courtesy of Microchip).
Maximum power consumption is the worst-case power draw by the system. It is important to determine this figure in order to properly design the product’s power supply. Many batteries perform differently depending on the rate of current draw from the cell.
Controlling dynamic power
To understand the origination of switching losses, consider the CMOS inverter shown in Figure 3. This inverter consumes little or no power when the input is at VDD
. However, when the signal switches from VDD
, there is a transition period where the p-type MOS (PMOS) and n-type MOS (NMOS) will both be biased in the linear region, allowing current to flow from VDD
to ground. Also note, in a real system there will be some load capacitance on the output bus, and consequently, there will be additional current consumption associated with the charging and discharging of this capacitance when the logic level changes.
Figure 3: CMOS inverter dynamic power-consumption paths.
The average power consumed by dynamic switching losses of a single gate can be defined by the following equation:
P = V² x f x C
Where V is the system voltage, f is the switching frequency, and C is the load capacitance. (Note that this equation is for a single CMOS device, not an entire chip such as a processor with thousands of transistors. When considering the entire chip, the equation must be multiplied by a scaling factor (‘a’), which varies depending on the switching frequency of all the gates in the device.)
Clocks consume power because they continuously toggle registers at the system frequency. As the formula above indicates, the operating frequency contributes to the dynamic power consumption. To reduce this consumption, designers use “clock gating” to turn off clocks while still maintaining the original design functionality. In addition to clock gating, many modern processors can run at variable clock speeds, allowing designers to lower the frequency when possible to gain power savings. Other devices use software to dynamically alter the clock speed, increasing it when processing demands are high and then reducing it for non-critical tasks.
However, because it is a squared term in the equation, voltage is the most significant factor affecting dynamic power consumption. Reducing voltage dramatically cuts energy consumption.
The operating voltage is primarily defined by the process technology used in the manufacture of the silicon. As process geometries have shrunk, operating voltages have dropped and devices consume less dynamic power.² However, it should be noted that static power could increase because smaller transistors suffer from greater sub-threshold and gate-leakage.
System power management
Smaller feature sizes have allowed chip voltages to drop from 3, down to 1.8, 1.5, and even 1.2 V. A typical circuit comprises of chips demanding different voltages.
Modern silicon is intolerant of fluctuations in the voltage supply. A shifting voltage can cause malfunctions, system errors, and even permanent damage.
Worse yet, battery voltage is not constant, tending to fall-off non-linearly depending on the load and remaining capacity. Figure 4 shows typical voltage versus capacity curves for a Li-ion battery. (The “C” value is the discharge rate, with 1C equal to the capacity rating, in this case 8 Ahr.)
Figure 4: Voltage versus capacity curves for a Li-ion battery.
A DC-DC converter (or voltage regulator) converts inconsistent battery voltage into a clean, stable output (or several outputs if required). There are literally dozens of popular topologies, but they can be grouped under two main types: linear or switching. Within those main categories, there are three sub-groups, step-down (“buck”), step-up (“boost”), and buck-boost (where the regulator can raise or lower the battery current depending on operational demands).
Switching regulators are highly efficient and able to boost, buck, and invert voltages with ease. They are the designer’s first choice when looking to maximize battery life. However, there are some drawbacks.
First, these are complex chips and it can take a lot of design effort to get a new product working properly. Second, the level of integration of contemporary devices does not come cheaply and increases chip size. Finally, all the high-frequency switching tends to generate noise.
To overcome some of the drawbacks experienced, designers incorporate low drop-out linear regulators (LDO) into their portable products to work in tandem with switching power supplies. LDOs are simple (requiring simpler support circuits with fewer external components), inexpensive, and there is no switching to generate excess noise.
LDOs do not have the overall efficiency of a switching product, but they do have the inherent advantage that the regulator actually becomes more efficient as the difference between the input and output voltage decreases. When the input voltage is only just above the output’s value, the LDO can approach 95 to 99 percent efficiency. (See the TechZone articles “Understanding the Advantages and Disadvantages of Linear Regulators
” and “Hybrid Power Supplies Deliver Noise-Free Voltages for Sensitive Circuitry
Power saving through integration
Factors such as tiny transistors, lower voltages, and low-power operational modes all help to extend battery life in portable products. However, the key to making the most of all these techniques is a PMU. The more functionality that can be integrated into the PMU, the better the power optimization because discrete chips and their associated interconnections consume more power than the equivalent monolithic device.³
Major suppliers offer ranges of PMUs for portable applications. Simpler devices focus on just integrating Li-ion battery charging, and switching regulators and LDOs for the target application. Others take things a considerable step further, adding more regulators and implementing on-chip functions for things like LED backlighting, touchscreens, and audio.
In the first category are PMUs like the MCP73871
. This is a device for system-load sharing and Li-ion/Li-polymer battery charge management with AC-DC wall adapter and USB port power source selection. The device can autonomously select either external power or battery inputs.
The company says the device adheres to the current-draw limits governed by the USB specification. With an adapter providing power, an external resistor sets the magnitude of 1 A maximum charge current while supporting up to 1.8 A total current for system load and battery-charge current.
offers a similar class of device with its FAN5400
. This chip offers portable product battery charging from a USB power source with a step-up (‘boost’) voltage regulator for system power.
The chip automatically restarts the charge cycle when the battery falls below an internal threshold. If the input source is removed, the device enters a high-impedance mode, preventing leakage from the battery to the input. The FAN540X operates as a boost regulator on command from the system. The regulator includes a soft-start that limits inrush current from the battery.
Freescale Semiconductor’s MC13783
takes portable product power a step further by integrating all the power management functions together with audio components onto a single chip.
The chip integrates four buck regulators to power processors and other low-voltage circuits such as memory. The output voltage of the regulators can be adapted to minimize processor current drain. The step-up (“boost”) regulator supplies backlight LEDs and regulators for a USB transceiver.
The MC13783 supports different charging- and supply-schemes including single- and serial-path charging. In a serial-path charging scheme, the portable device can operate directly from the charger if the battery is removed or completely discharged.
offers a similarly specialized PMU, this time designed to power advanced application processors. The company claims the LP3971
is optimized for low-power handheld applications and provides six LDOs, three switching buck regulators, a back-up battery charger, and two general-purpose inputs/outputs (GPIO). Figure 5 shows a simplified application circuit for the LP3971.
Figure 5: A simplified application circuit for TI’s LP3971 power-management unit for application processors.
Maximizing battery life requires an understanding that power consumption is not necessarily everything. Burning a little more power to speed things up can sometimes lower the energy drain of the battery. It is also important for the designer to realize that managing the power budget is best done in incremental design steps that consider the physical silicon, operating voltages and modes, voltage regulators, techniques such as adapting the clock rate, circuit layout, and software. Each step yields small results, but the overall effect is significant.
The key step in the process is consideration of the PMU itself. The more functionality that can be integrated onto the chip, within the constraints of the bill-of-materials (BOM) budget, the greater the likely power savings.
For more information on the parts mentioned in this article, use the links provided to access product pages on the Digi-Key website.
- “Hooked on Lithium,” The Economist, June 2002.
- “Low-Power Design Guide” Brant Ivey, Microchip Technology, 2011.
- “Power Management in Wireless SoC and Software,” Sabyasachi Dey, Texas Instruments Developer Conference, 2006.